Microelectronic devices generally include many on-die interconnects to provide signal delivery and distribution functions for the circuitry. These interconnects are typically used to carry, for example, clock signals, power signals, and/or data signals to various points on the die. In the past, the loss within these on-die interconnects was not a primary concern. Instead, the interconnects were designed to prevent ringing and other signal compromising effects. The loss within on-die interconnects, however, is now becoming a greater concern. For example, one low skew clocking strategy that is currently being considered for use within microelectronic devices is salphasic clocking. Salphasic clocking uses standing waves on a transmission medium to distribute a clock signal in a relatively low skew manner. To generate standing waves that are adequate to support salphasic clocking, however, transmission structures having relatively low loss are typically required. For this and other reasons, there is a need for low loss interconnect structures that can be implemented on-die within a microelectronic device.